biFROST
Agnostic Electro-Optical Fabrics for Sovereign AI Compute.
biFROST is an early-stage research and development program from RetroHubAI, Inc. — a Canadian company — exploring an additive, multi-material hardware acceleration layer that would migrate standard silicon copper SerDes pathways into low-loss optical waveguides. The intent is to build this technology in Canada: sovereign AI-compute hardware, developed on Canadian photonics infrastructure, aimed at net-zero high-performance computing. Nothing on this page is a shipped product; it is a concept under active validation.
RetroHub AI Studio
Our software development arm — a full-cycle studio delivering the RetroHub AI production platform and custom AI programs end to end. This is the operating business that funds and grounds the research.
Visit the Studio →biFROST
Our future hardware arm — R&D toward an agnostic copper-to-optical bus interface for HPC and AI infrastructure. Currently in the experimental development and concept-validation stage: physics modeling, materials selection, and additive fabrication feasibility.
STATUS: RESEARCH — NO COMMERCIAL HARDWARE YETCopper is hitting a signal wall.
Modern high-performance computing and large-language-model scaling are running into physics. At lane rates of 112 Gbps and beyond, copper traces on conventional substrates suffer severe high-frequency signal degradation (skin effect) and intense resistive thermal dissipation.
The consequence: data centers burn ever more electricity on signal conditioning and HVAC draw just to keep copper viable, while physical bus reach keeps shrinking. Interconnect — not compute — is becoming the limiting cost of scaling AI.
An agnostic electro-optical circuit board bridge.
biFROST research decouples silicon computation from the physical distribution layer. Instead of asking semiconductor vendors to alter their silicon, the concept intercepts high-speed electrical signals (SerDes / PCIe Gen 5/6) millimeters from standard processor pins and translates them into light through an honest, purpose-built bridge — a retimer plus a VCSEL-driver/TIA optical front end. Light is then carried across a low-loss optical waveguide fabric and recovered by silicon photodiodes downstream.
The waveguide fabric is fabricated by a staged process: desktop direct-ink-write tooling for early prototyping, graduating to an industrial photonics fab (foundry SiN or laser-direct-write) for production. Only the long-reach, high-speed links go optical — memory (DDR/HBM) stays on copper, and so does power delivery, where they belong. The win is reach, bandwidth density, and energy-per-bit at distance — not latency.
Because the bridge lives beside the package — not inside it — the approach under study is completely platform-agnostic. The same translator layer concept applies across host silicon:
The research thesis is grant-aligned by design: sovereign AI compute through infrastructure efficiency, thermal-reduction fabric replacing resistive heat, EMI-immune signal isolation for dual-use deployments, and token-per-watt maximization as the economic north star — a decoupled architecture for net-zero infrastructure.
Copper vs. optical, side by side.
A first-order physics model of the trade-off under research. All values are modeled projections for concept validation — not measured hardware data.
Hardware Configurations
Waveguide Waveform Model
Model view: high signal attenuation and resistive heating along copper traces as lane rate climbs.
Modeled projection — illustrative first-order physics model for an R&D concept. Not measured hardware data.
The subsystem map.
How the four conceptual stages connect — from host silicon escape to photodiode pickup.
System Fabric Visualizer
Conceptual mapping of the agnostic optoelectronic interconnect pathway — R&D architecture in development, not fabricated hardware.
Conceptual R&D schematic — architecture in development.
SerDes Escape
High-speed differential SerDes channels escape standard packaging boundaries over localized ultra-short copper footprints — no changes to the host silicon.
STATUS: R&D — CONCEPT VALIDATIONVCSEL Translation
Electrical signals terminate directly into vertical-cavity surface-emitting laser (VCSEL) arrays, converting the data stream into structured infrared light.
STATUS: R&D — CONCEPT VALIDATIONOptical Waveguide Fabric
Total internal reflection carries the data across a low-loss optical waveguide core inside fluoropolymer cladding. The fabric is prototyped on desktop tooling, then industrialized on a photonics foundry process — the material is proven; the method is staged.
STATUS: R&D — CONCEPT VALIDATIONPIN Photodiode Pickup
Silicon PIN photodiodes pick up the photon frames natively, returning the data fabric to downstream destination hosts electrically.
STATUS: R&D — CONCEPT VALIDATIONBreadboard first. Then the factory.
Desktop direct-ink-write tooling is our prototype breadboard — cheap, fast, non-cleanroom — not our production line. The industrial step moves the optical fabric to a photonics foundry and the bridge to merchant silicon, characterized on shared Canadian facilities.
Stage 1: Prove it on the bench
Desktop direct-ink-write (Voltera-class) tooling to prove coupling, materials, and bridge logic at low speed. Cheap, non-cleanroom, fast iteration.
STATUS: R&D — CONCEPT VALIDATIONStage 2: Industrialize the fabric
Optical fabric on a foundry SiN / laser-direct-write process; merchant retimer + VCSEL-driver/TIA silicon for the bridge; 112G characterization via CMC Microsystems, NRC CPFC, and university labs.
STATUS: R&D — CONCEPT VALIDATIONFollow the research.
biFROST is early-stage experimental development. If you work in photonics, additive manufacturing, HPC infrastructure, or Canadian innovation funding and want to talk about the program, we would like to hear from you.