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THE PLAN · R&D ROADMAP

A Sovereign Optical Fabric for AI Compute.

RetroHub AI ships software today (the Studio arm). biFROST is the hardware arm — an R&D program to move data as light between standard silicon, and the staged plan to build it.

Concept render of an optical motherboard — illustrative, modeled projection
THE THESIS
Move data as light

Interconnect — not compute — is the wall.

At 112–224 Gbps per lane, copper between chips hits a physics ceiling: skin-effect loss, resistive heat, sub-meter reach, rigid topology. biFROST moves the long-reach, high-speed links to light — picks and shovels for AI's scale-out.

THE PROBLEM

Copper is hitting a signal wall.

Every dB lost in copper becomes heat a facility must remove, and usable trace length collapses at 112+ Gbps. The interactive copper-vs-optical model lives on the program page.

→ See the interactive model on /bifrost
THE DEFENSIBLE ARCHITECTURE

Optics where it wins. Copper where it belongs.

The honest link-by-link map. Optics takes the long-reach, high-speed SerDes; the bridge port is real custom silicon (a retimer + optical front end); the value is reach, bandwidth density, and energy-per-bit — never latency.

OPTICAL
GPU ↔ GPU / CPU ↔ GPU scale-out
Optical — long-reach, high-speed SerDes
OPTICAL
Board-to-board / rack
Optical — meters of reach, no skin-effect wall
OPTICAL
PCIe / CXL fabric lanes
Optical — reconfigurable, any-to-any
COPPER
Memory (DDR / HBM)
stays on copper — latency-critical, die-adjacent
COPPER
Power delivery / low-speed I/O
stays on copper — you can't push watts down a fiber
Concept render: optical deck with sockets on the optical plane and a copper memory island — illustrative
STAGE 1 → STAGE 2 HARDWARE ROADMAP

Breadboard first. Then the factory.

Desktop tooling is our prototype breadboard — not our production line. The industrial step moves the fabric to a photonics foundry and the bridge to merchant silicon.

STAGE 1 · PROTOTYPE

Prove it on the bench

Desktop direct-ink-write (Voltera-class) tooling to prove coupling, materials, and bridge logic at low speed — cheap, non-cleanroom, fast. Our breadboard, not our factory.

STAGE 2 · INDUSTRIAL

Industrialize the fabric

Optical fabric on a foundry SiN / laser-direct-write process; merchant retimer + VCSEL-driver/TIA silicon for the bridge; 112G characterization via shared Canadian facilities (CMC Microsystems, NRC CPFC, university labs).

THE DEVELOPMENT PLAN

What we're building, in order.

Every hardware program crosses these milestones. Here are ours — the challenge, and our approach. Every milestone reflects a rigorous internal technical review.

PHASE 1 → 2

Prove the optical fabric

Challenge — Get low-loss light through a manufacturable waveguide.

Our approach — Prototype on desktop tooling, then industrialize on a foundry SiN / laser-direct-write process via Canadian fab access.

PHASE 1 → 2

Solve the optical join

Challenge — Couple light in and out cheaply and reliably at scale — the real cost driver.

Our approach — A per-port coupling budget and assembly-yield model; passive-alignment and array approaches (including microLED arrays under evaluation).

PHASE 1 → 2

Build the bridge

Challenge — The port must speak PCIe/CXL and drive light at 112G and beyond.

Our approach — Integrate merchant retimer + VCSEL-driver/TIA silicon now, with a path to our own bridge ASIC.

PHASE 2

Scale the lanes

Challenge — Multiply bandwidth without fragile wavelength tricks.

Our approach — Spatial parallelism — many multimode cores — rather than wavelength-division in polymer.

PHASE 3

Earn the moat

Challenge — Stand apart from well-funded incumbents.

Our approach — An AMD-compatible demo leading to partnership, standards engagement (CXL / UCIe / UALink / OIF), and sovereign Canadian manufacturing.

ONGOING

Lay the Track-B groundwork

Challenge — Make today's fabric carry tomorrow's optical compute.

Our approach — Architect the interconnect fabric to host compute-in-light components as they mature — the frontier North Star.

SOVEREIGN CANADA

Canada leads AI research. It owns almost no AI hardware.

biFROST turns a research leader into a hardware producer — retained IP, skilled jobs, export revenue — built on real Canadian photonics heritage (Ottawa's cluster, NRC CPFC, CMC Microsystems) and its shared fabrication infrastructure.

Concept render: optical motherboard with a subtle maple-leaf etch and a copper memory bank — illustrative
THE MARKET & THE PRIZE

A billion-dollar prize, de-risked one gate at a time.

Winning optical-interconnect companies are billion-dollar outcomes — and one just exited.

Celestial AI
→ Marvell, up to ~$5.5B
Acquired (exit) — proof the prize is real.
Lightmatter
~$4.4B
Private, Series D.
Ayar Labs
~$3.75B
Private, Series E (2026); AMD + NVIDIA in.
TAM
Silicon photonics ~$2–3B (2026), growing ~25–29%/yr toward $10–18B by the early 2030s.
SAM
The agnostic board-level optical-fabric / retrofit segment — a fast-growing slice of optical interconnect + CPO + composable infrastructure.
SOM
Early pilots with sovereign Canadian HPC and select enterprise — bottom-up from the first systems.
COMPETITIVE POSITION

The one agnostic, retrofit fabric.

Peers build optics inside their own packages for their own silicon (Ayar, Lightmatter, Celestial, POET, Avicena). biFROST moves data as light and retrofits anyone's standard silicon. Photonic-compute players like Q.ANT are complements our fabric can host — not competitors.

Axis 1 — computes-in-light ⟷ moves-data-as-light
Axis 2 — replaces-silicon ⟷ retrofits-silicon
★ biFROST — the uncontested moves-data-as-light × retrofits-silicon quadrant.
FUNDING APPROACH

Capital-efficient by design.

A lean Phase-1 wedge, with the larger raises staged after a bench demo de-risks the tech. Canadian shared photonics infrastructure keeps capex low and is itself the sovereignty story. biFROST is grant-aligned across:

NRC IRAP — experimental development + skilled jobsNRC IRAP Clean Technology — net-zero interconnect efficiencyPacifiCan / RAII — Western-Canada AI (repayable, interest-free)Canadian Sovereign AI Compute Strategy — domestic compute independenceSR&ED — refundable R&D tax credits (CCPC)IDEaS — dual-use defence/securityMitacs · NGen · Scale AI — talent + AI-designed manufacturing

Program eligibility and structure vary and are pursued on their own timelines; nothing here represents an awarded grant.

THE LONG ARC
From moving light to computing in light

We're building the road — and designing it to carry what comes next.

TRACK A · NOW

Solve today's copper interconnect ceiling — move data as light between standard silicon. The fundable, defensible wedge.

TRACK B · FRONTIER

The North Star: compute in light. The fabric we build for Track A is deliberately architected to host optical-compute components — a sovereign optical-compute platform. A long-horizon frontier, not a near-term claim.

Follow the research.

biFROST is early-stage experimental development. If you work in photonics, additive manufacturing, HPC infrastructure, or Canadian innovation funding, we'd like to talk.